深圳市广辉电子有限公司

SINGLE-CHIP 9-PORT 10/100MBPS SWITCH CONTROLLER 网络接口ic

标准包装 ：	66
描 述 ：	基于AVR的RTL8309网络交换芯片的控制程序（SMI接口协议）
应用 ：	通过SMI接口协议来操作寄存器
接口 ：	SMI协议
电源电压 ：	1.8v
封装/外壳 ：	QFP-128
供应商 ：	Realtek
包装 ：	托盘
安装类型 ：	贴片

Feature
􀂄 Integrates eight 10/100 transceivers and nine
MAC units for 10Base-T and 100Base-TX.
􀂄 Embedded SRAM for packet storage.
􀂄 On-chip 1024-entry look-up table in direct
mapping mode.
􀂄 Embedded 16-entry CAM for hash collision
mapping.
􀂄 Provides read/write access to look-up table
entries via SMI interface.
􀂄 Provides non-blocking wire speed reception
and transmission.
􀂄 Flow control fully supported:
􀂋 Half-duplex: backpressure flow control.
􀂋 Full-duplex: IEEE 802.3x flow control.
􀂄 Support for 4 LEDs per-port in various
combinations for comprehensive
applications.
􀂄 Optional loop detection function with an
LED to indicate the existence of a loop.
􀂄 Supports MII loopback.
􀂄 LEDs blink upon reset for LED diagnostics.
􀂄 Flexible system configuration by strapping
pins, EEPROM, or SMI interface.
􀂄 Optional crossover detection and auto
correction for plug-and-play.
􀂄 Fully compliant with IEEE 802.3/802.3u.
􀂄 Optional Forwarding/Filtering reserved
control frames (DID=
0180C2000003~0180C200000F).
􀂄 Optional Broadcast Input/Output Drop flow
control.
􀂄 Optional maximum packet length
1536/1552 Bytes.
􀂄 Supports two Power Reduction methods:
􀂋 Power saving mode (automatic cable
detection).
􀂋 Power down mode (via PHY
register 0.11).
􀂄 Supports QoS function:
􀂋 QoS based on: (1) Port-based priority (2)
802.1p VLAN tag (3) DiffServ/TOS field
in TCP/IP header (4) IP address.
􀂋 Supports two-level priority queues with
various weighting ratios.
􀂋 Queue service rate based on weighted
round robin algorithm.
􀂋 Optional auto turn off Flow Control for
1~2 sec to avoid head-of-line blocking.
􀂄 Supports MII interface connection to external
MAC or PHY via 3 modes.
􀂋 PHY mode MII for router applications.
􀂋 PHY mode SNI for router applications.
􀂋 MAC mode MII for HomePNA or other
PHY applications.
􀂄 Flexible 802.1Q port/tag-based VLAN.
􀂋 Optional 802.1Q tag-VID aware function.
􀂋 Optional VLAN Ingress Tag Admit
Control.
􀂋 Optional VLAN Ingress Member set
filtering.
􀂋 Optional ARP VLAN for broadcast packet.
􀂋 Optional Leaky VLAN for unicast packet.
􀂄 Optional 802.1P/Q tag insertion or removal
on per-port basis (egress).
􀂄 25MHz crystal input.
􀂄 0.18μm, CMOS technology.
􀂄 128-pin PQFP package.
􀂄 1.8V core voltage.
􀂄 Independent power options for 2.5V or 3.3V

 

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对公帐户

深圳市福田区广辉电经营部   中国农业银行深圳桃源支行
帐号：

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